A random access memory (RAM) including a deserializer is disclosed. The RAM further comprises a continuous-time linear equalizer (CTLE) including a first input terminal that receives an input signal for the RAM and a first output terminal communicatively connected to the deserializer, the CTLE configured to perform a channel gain compensation on the input signal received by the first input terminal and to transmit the compensated input signal to the deserializer. The RAM may further comprise a decision feedback equalizer (DFE) including a second input terminal communicatively connected to the CTLE and a second output terminal communicatively connected to the deserializer, the DFE configured to reduce an inter-symbol interference (ISI) of the input signal.