Invention Grant
- Patent Title: Gap-fill method having improved gap-fill capability
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Application No.: US16414273Application Date: 2019-05-16
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Publication No.: US10943820B2Publication Date: 2021-03-09
- Inventor: Wan-Yi Kao , Wei-Jin Li , Chung-Chi Ko , Yu-Cheng Shiau , Han-Sheng Weng , Chih-Tang Peng , Tien-I Bao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/78 ; H01L29/66 ; H01L21/8234 ; H01L27/088 ; H01L21/02 ; H01L21/762

Abstract:
A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a first semiconductor fin and a second semiconductor fin adjacent to the first semiconductor fin, and depositing a first dielectric material on the first semiconductor fin and the second semiconductor fin on the semiconductor substrate using an atomic layer deposition process. There is a first trench between the first semiconductor fin and the second semiconductor fin. The method also includes filling the first trench with a flowable dielectric material, and heating the flowable dielectric material and the first dielectric material to form an isolation structure between the first semiconductor fin and the second semiconductor fin.
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