Invention Grant
- Patent Title: Structure for interconnection
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Application No.: US16853136Application Date: 2020-04-20
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Publication No.: US10943868B2Publication Date: 2021-03-09
- Inventor: Hsiang-Wei Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/532 ; H01L23/528 ; H01L21/311 ; H01L21/768 ; H01L21/67 ; H01L21/764 ; H01L23/522 ; H01L21/3105 ; H01L23/485 ; H01L23/00 ; H01L23/535

Abstract:
A semiconductor structure includes a first low-k dielectric layer disposed over a semiconductor substrate, a first conductive feature and a second conductive feature disposed in the first low-k dielectric layer, a second low-k dielectric layer disposed in the first low-k dielectric layer and interposed between the first conductive feature and the second conductive feature, where the second low-k dielectric layer includes an air gap, and an etch-stop layer disposed at an interface between the first low-k dielectric layer and the second low-k dielectric layer. The first low-k dielectric layer includes carbon whose concentration is graded in a direction away from the etch-stop layer.
Public/Granted literature
- US20200251418A1 Method and Structure for Interconnection Public/Granted day:2020-08-06
Information query
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