Invention Grant
- Patent Title: Plating methods for modular and/or ganged waveguides for automatic test equipment for semiconductor testing
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Application No.: US15016143Application Date: 2016-02-04
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Publication No.: US10944148B2Publication Date: 2021-03-09
- Inventor: Don Lee , Daniel Lam , Roger Mcaleenan , Kosuke Miyao
- Applicant: Advantest Corporation
- Applicant Address: JP Tokyo
- Assignee: Advantest Corporation
- Current Assignee: Advantest Corporation
- Current Assignee Address: JP Tokyo
- Main IPC: H01P11/00
- IPC: H01P11/00 ; H01P1/04 ; H01Q9/04 ; H01Q21/08 ; H05K3/46 ; H01P3/16 ; H01P1/208 ; H01Q1/24

Abstract:
Embodiments described herein perform incisions along the direction of the long axis of the waveguide, thereby exposing a trench structure which can be readily plated. Once divided and plated, the individual cut pieces can then be secured together to restore the original waveguide structure. In this fashion, multiple cut pieces can be secured together and used as “building blocks” to create a modular solution which can be used to provide a number of different customizable waveguide structures. Thus, embodiments described herein can perform plating procedures in a less expensive manner while achieving the benefits of ganged waveguide structures. Moreover, embodiments described herein can offer a modular approach to ganged waveguide design thereby allowing for end-user flexibility in testing.
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