A delay line includes a delay chain, a pulse generator generating a pulse based on a received input signal, and a delay chain control circuit. The delay chain control circuit has a first input receiving the pulse, a second input receiving output from a last element of the delay chain, and a selection input receiving a delayed version of the received input signal. The delay chain control circuit has an output coupled to provide input to a first element of the delay chain in response to the delayed version of the received input signal. An output selection circuit receives outputs from each element of the delay chain, counts assertions of the output of the last element of the delay chain and, in response to the count being equal to a desired count, passes a desired one of the outputs of the elements of the delay chain as output.