A data transmission circuit includes: a main driver circuit suitable for driving data to an output line; an amplitude equalization window generator circuit suitable for detecting the data transitioning from a first level to a second level; an auxiliary driver circuit suitable for driving the output line with the second level in response to a detection result of the amplitude equalization window generator circuit; and a phase equalization window generator circuit suitable for detecting whether the data consecutively has the first level, wherein the main driver circuit changes a time point of driving the data in response to a detection result of the phase equalization window generator circuit.