Invention Grant
- Patent Title: Passive linear equalizer for serial wireline receivers
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Application No.: US16567721Application Date: 2019-09-11
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Publication No.: US10944602B1Publication Date: 2021-03-09
- Inventor: Alan C. Rogers , Mohammad Mahdi Ahmadi
- Applicant: Analog Bits Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Analog Bits Inc.
- Current Assignee: Analog Bits Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Fish & Richardson P.C.
- Main IPC: H04L25/03
- IPC: H04L25/03

Abstract:
Some implementations provide a passive equalizer section configured to filter an input signal, the passive equalizer section including: a first passive filter that comprises: a first resistor characterized by a first resistance, and a first reactive component characterized by a first reactance, wherein the first resistor and the first reactive component are in series and connected at a first connection node; and a second passive filter that comprises: a second resistor characterized by a second resistance, and a second reactive component characterized by a second reactance, wherein the second resistor and the second reactive component are in series and connected at a second connection node; and a signal mixing section comprising a plurality of transistors to mix signals with different frequency response characteristics.
Public/Granted literature
- US20210075653A1 Passive Linear Equalizer for Serial Wireline Receivers Public/Granted day:2021-03-11
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