Invention Grant
- Patent Title: Method of analyzing semiconductor structure
-
Application No.: US16263869Application Date: 2019-01-31
-
Publication No.: US10955459B2Publication Date: 2021-03-23
- Inventor: Yi Min Liu , Chien-Yi Chen , Yian-Liang Kuo
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/265 ; H01L21/67 ; G01R31/28 ; H01L21/687
Abstract:
A method includes loading the semiconductor structure on a stage; providing a detector disposed above the semiconductor structure and the stage; applying a voltage to the semiconductor structure; identifying a portion of the semiconductor structure at a temperature substantially greater than a predetermined threshold by the detector; rotating the stage and recording a rotation of the stage after identifying the portion of the semiconductor structure; and deriving a position of the portion of the semiconductor structure based upon the rotation of the stage.
Public/Granted literature
- US20200003825A1 METHOD OF ANALYZING SEMICONDUCTOR STRUCTURE Public/Granted day:2020-01-02
Information query
