A mask process development having a consistent mask targeting is described. A method includes receiving an integrated circuit (IC) design. A test mask is generated that converts the IC design into one or more physical layouts. A set of one or more sub-resolution assist features (SRAFs) is inserted into the test mask. The set of one or more SRAFs is inserted into one or more other masks, which are derived from the test mask for mask targeting, such that the test mask and the one or more other masks include a same set of the one or more SRAFs.