Non-volatile memory having a non-volatile memory array adapted to store a configuration routine for a low power dynamic random access memory (LPDRAM), a memory interface for receiving addresses from an external device for access of data stored in the non-volatile memory array, and an internal controller adapted to communicate with a LPDRAM coupled to the non-volatile memory and configure operational settings of the LPDRAM using the configuration routine, as well as systems containing similar non-volatile memory.