Invention Grant
- Patent Title: Cache coherent node controller for scale-up shared memory systems having interconnect switch between a group of CPUS and FPGA node controller
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Application No.: US16610326Application Date: 2018-04-30
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Publication No.: US10956329B2Publication Date: 2021-03-23
- Inventor: Einar Rustad , Helge Simonsen , Steffen Persvold , Goutam Debnath , Thomas Moen
- Applicant: Numascale AS
- Applicant Address: NO Oslo
- Assignee: Numascale AS
- Current Assignee: Numascale AS
- Current Assignee Address: NO Oslo
- Agency: Osha Bergman Watanabe & Burton LLP
- Priority: NO20170719 20170502
- International Application: PCT/NO2018/050115 WO 20180430
- International Announcement: WO2018/203754 WO 20181108
- Main IPC: G06F12/0817
- IPC: G06F12/0817 ; G06F9/54 ; G06F12/0813 ; G06F13/40 ; G06F15/173
Abstract:
The present invention relates to cache coherent node controllers for scale-up shared memory systems. In particular it is disclosed a computer system at least comprising a first group of CPU modules connected to at least one first FPGA Node Controller configured to execute transactions directly or through a first interconnect switch to at least one second FPGA Node Controller connected to a second group of CPU modules running a single instance of an operating system.
Public/Granted literature
- US20200089612A1 CACHE COHERENT NODE CONTROLLER FOR SCALE-UP SHARED MEMORY SYSTEMS Public/Granted day:2020-03-19
Information query
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