Invention Grant
- Patent Title: Monolithic integration of III-V cells for powering memory erasure devices
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Application No.: US16420567Application Date: 2019-05-23
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Publication No.: US10957659B2Publication Date: 2021-03-23
- Inventor: Kenneth Rodbell , Davood Shahrjerdi
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent L. Jeffrey Kelly
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L31/18 ; G06F21/87 ; H01L27/142 ; H01L31/0693 ; H01L27/144

Abstract:
A method for making a photovoltaic device is provided that includes the steps of providing a silicon substrate having a complementary metal-oxide semiconductor (“CMOS”); bonding a first layer of silicon oxide to a second layer of silicon oxide wherein the bonded layers are deposited on the silicon substrate; and forming a III-V photovoltaic cell on a side of the bonded silicon oxide layers opposite the silicon substrate, wherein when the III-V photovoltaic cell is exposed to radiation, the III-V photovoltaic cell generates a current that powers a memory erasure device to cause an alteration of a memory state of a memory cell in an integrated circuit.
Public/Granted literature
- US20190279946A1 MONOLITHIC INTEGRATION OF III-V CELLS FOR POWERING MEMORY ERASURE DEVICES Public/Granted day:2019-09-12
Information query
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