Invention Grant
- Patent Title: Synchronization and exchange of data between processors
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Application No.: US16276834Application Date: 2019-02-15
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Publication No.: US10963315B2Publication Date: 2021-03-30
- Inventor: David Lacey , Daniel John Pelham Wilkinson , Richard Luke Southwell Osborne , Matthew David Fyles
- Applicant: Graphcore Limited
- Applicant Address: GB Bristol
- Assignee: Graphcore Limited
- Current Assignee: Graphcore Limited
- Current Assignee Address: GB Bristol
- Agency: Haynes and Boone, LLP
- Priority: GB1811017 20180704,GB1821193 20181224
- Main IPC: G06F9/52
- IPC: G06F9/52 ; G06F9/30 ; G06F9/38 ; G06F9/54 ; G06F9/48 ; G06F16/901 ; G06F15/167 ; G06F15/173 ; H04L12/801 ; H04L29/06 ; H04L29/08

Abstract:
A system comprising: a first subsystem comprising one or more first processors, and a second subsystem comprising one or more second processors. The second subsystem is configured to process code over a series of steps delineated by barrier synchronizations, and in a current step, to send a descriptor to the first subsystem specifying a value of each of one or more parameters of each of one or more interactions that the second subsystem is programmed to perform with the first subsystem via an inter-processor interconnect in a subsequent step. The first subsystem is configured to execute a portion of code to perform one or more preparatory operations, based on the specified values of at least one of the one or more parameters of each interaction as specified by the descriptor, to prepare for said one or more interactions prior to the barrier synchronization leading into the subsequent phase.
Public/Granted literature
- US20200012536A1 SYNCHRONIZATION AND EXCHANGE OF DATA BETWEEN PROCESSORS Public/Granted day:2020-01-09
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