Provided is an array substrate including gate lines, data lines, and a first alignment layer above a layer where the gate lines are located and a layer where the data lines are located, the gate lines and the data lines being arranged to intersect with each other to divide the array substrate into pixel regions. Each pixel region includes first and second sides opposite to each other and third and fourth sides opposite to each other, each of the first and second sides connecting the third side to the fourth side and extending in one direction, lengths of the first and second sides being greater than lengths of the third and fourth sides, the first alignment layer having a first alignment direction, and each of the first and second sides forming an acute angle with the first alignment direction. A display panel and a display device are also provided.