Invention Grant
- Patent Title: Address translation for scalable linked devices
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Application No.: US16236473Application Date: 2018-12-29
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Publication No.: US10969992B2Publication Date: 2021-04-06
- Inventor: Saurabh Gayen , Dhananjay A. Joshi , Philip R. Lantz , Rajesh M. Sankaran
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/0862 ; G06F12/1027 ; G06F9/455

Abstract:
Systems, methods, and devices can include a processing engine implemented at least partially in hardware, the processing engine to process memory transactions; a memory element to index physical address and virtual address translations; and a memory controller logic implemented at least partially in hardware, the memory controller logic to receive an index from the processing engine, the index corresponding to a physical address and a virtual address; identify a physical address based on the received index; and provide the physical address to the processing engine. The processing engine can use the physical address for memory transactions in response to a streaming workload job request.
Public/Granted literature
- US20190138240A1 ADDRESS TRANSLATION FOR SCALABLE LINKED DEVICES Public/Granted day:2019-05-09
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