Invention Grant
- Patent Title: Compiler and information processing method for deleting spill instructions
-
Application No.: US16774019Application Date: 2020-01-28
-
Publication No.: US10970056B2Publication Date: 2021-04-06
- Inventor: Toshiyuki Ichiba
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JPJP2019-032032 20190225
- Main IPC: G06F8/41
- IPC: G06F8/41

Abstract:
A compiler device includes: a processor configured to: when a first register is allocated to first and second spill instructions, which refer to same data in a memory, of an instruction sequence and to a first section between the first and second spill instructions, search for a second register that is a candidate allocated to the first section instead of the first register; when a second section allocated with the second register and the first section do not overlap, allocate the second register to the first section instead of the first register; when the first and second sections overlap, allocate a third register to the second section instead of the second register, and then allocate the second register to the first section instead of the first register; and thereafter, delete an instruction executed later than the other instruction of the first and second spill instructions.
Public/Granted literature
- US20200272442A1 COMPILER DEVICE AND INFORMATION PROCESSING METHOD Public/Granted day:2020-08-27
Information query