Invention Grant
- Patent Title: Method of forming source/drain regions of transistors
-
Application No.: US16658597Application Date: 2019-10-21
-
Publication No.: US10971406B2Publication Date: 2021-04-06
- Inventor: Yu-Hung Cheng , Ching-Wei Tsai , Yeur-Luen Tu , Tung-I Lin , Wei-Li Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/267
- IPC: H01L29/267 ; H01L21/8238 ; H01L27/092 ; H01L29/78 ; H01L29/66

Abstract:
A method for fabricating a semiconductor device includes providing a first wafer comprising a substrate and a first semiconductor material layer, bonding the first wafer to a second wafer, the second wafer comprising a sacrificial layer and a second semiconductor material layer, removing the sacrificial layer, patterning the bonded wafers to create a first structure and a second structure, removing the second semiconductor material from the first structure, forming a first type of transistor in the first semiconductor material of the first structure, and forming a second type of transistor in the second semiconductor material of the second structure.
Public/Granted literature
- US20200051871A1 METHOD OF FORMING SOURCE/DRAIN REGIONS OF TRANSISTORS Public/Granted day:2020-02-13
Information query
IPC分类: