Invention Grant
- Patent Title: Semiconductor package including stacked semiconductor chips
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Application No.: US16781642Application Date: 2020-02-04
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Publication No.: US10971479B2Publication Date: 2021-04-06
- Inventor: Suk-Won Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2019-0098101 20190812
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/522 ; H01L23/528

Abstract:
A semiconductor package includes: a substrate; a first interposer disposed over the substrate; a first chip stack disposed on the substrate on one side of the first interposer, wherein the first chip stack includes a plurality of first semiconductor chips stacked with an offset in a first direction; a second chip stack disposed on the first chip stack, wherein the second chip stack includes a plurality of second semiconductor chips stacked with an offset in a second direction opposite to the first direction; and a third chip stack disposed on the substrate on an other side of the first interposer, wherein the third chip stack includes a plurality of third semiconductor chips stacked with an offset in the second direction.
Public/Granted literature
- US20210050328A1 SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR CHIPS Public/Granted day:2021-02-18
Information query
IPC分类: