Invention Grant
- Patent Title: Power semiconductor device with self-aligned source region
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Application No.: US16545231Application Date: 2019-08-20
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Publication No.: US10971599B2Publication Date: 2021-04-06
- Inventor: Hans-Juergen Thees
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102018120433.7 20180822
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/66 ; H01L21/02 ; H01L21/265 ; H01L29/78 ; H01L21/266 ; H01L29/06 ; H01L29/10 ; H01L29/417 ; H01L29/739

Abstract:
An auxiliary layer is formed above a semiconductor body surface of a semiconductor body, the auxiliary layer being coupled to the semiconductor body and having an auxiliary layer surface. Trenches extend from the auxiliary layer surface along a vertical direction through the auxiliary layer into the semiconductor body, wherein two facing trench sidewalls of two adjacent trenches laterally confine a mesa region of the semiconductor body along a first lateral direction, each adjacent trench including a trench section protruding out of the semiconductor body surface. The trenches are filled with a trench filler material which is planarized to expose the auxiliary layer. The auxiliary layer is removed to least partially while maintaining the protruding trench sections. The mesa region is subjected to an implantation tilted by an angle of at least 10°, the protruding trench sections of the adjacent trenches serving at least partially as a mask during the implantation.
Public/Granted literature
- US20200066870A1 Power Semiconductor Device with Self-Aligned Source Region Public/Granted day:2020-02-27
Information query
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