A semiconductor device includes a power semiconductor switching element including a characteristic test terminal, and a control circuit configured to control an operation of the power semiconductor switching element. The power semiconductor switching element and the control circuit are formed in a same chip. The control circuit includes a gate voltage generation circuit configured to generate a current limit gate voltage for restricting an overcurrent flowing in the power semiconductor switching element in a desired range when an abnormality occurs, based on a characteristic of the power semiconductor switching element which is measured in advance by applying a voltage to the characteristic test terminal.