An image sensor may include an array of image pixels. The image pixel pixels may be arranged in columns and rows. Each column of image pixels may be coupled to column readout circuitry via respective column lines. The column readout circuitry may include amplifier circuitry, a first source follower stage, and a second source follower stage. The first and second source follower stages may be interposed between the amplifier circuitry and a sampling capacitor. A switch may be interposed between the first and second source follower stages. The second source follower transistor may be configured to provide an intermediate sampling voltage to the sampling capacitor. The first source follower transistor may be configured to provide a final sampling voltage to the sampling capacitor. In such a manner, kickback from sampling signals using readout circuitry may be reduced.