Invention Grant
- Patent Title: Memory apparatus relating to determination of a failed region and test method thereof, memory module and system using the same
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Application No.: US16387912Application Date: 2019-04-18
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Publication No.: US10976368B2Publication Date: 2021-04-13
- Inventor: Ja Beom Koo
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2017-0013627 20170131
- Main IPC: G01R31/3193
- IPC: G01R31/3193 ; G11C29/02 ; G11C5/04 ; G11C29/38

Abstract:
A memory device may be provided. The memory device may include a test data output circuit configured to compare lower data output from a lower data storage region with upper data output from an upper data storage region and make a decision. The memory device may include a data transmitter configured to output the lower data by inverting or noninverting the lower data according to the decision. The memory device may include a test control circuit generates a test control signal according to a test read signal and an address signal.
Public/Granted literature
Information query
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