Invention Grant
- Patent Title: Prefetching data to reduce cache misses
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Application No.: US16199852Application Date: 2018-11-26
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Publication No.: US10977176B2Publication Date: 2021-04-13
- Inventor: David Carlson , Shubhendu S. Mukherjee
- Applicant: Cavium LLC
- Applicant Address: US CA Santa Clara
- Assignee: Cavium LLC
- Current Assignee: Cavium LLC
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0862 ; G06F12/1018 ; G06F12/0882

Abstract:
A first memory request including a first virtual address is received. An entry in memory is accessed. The entry is selected using information associated with the first memory request, and includes at least a portion of a second virtual address (first data) and at least a portion of a third virtual address (second data). The difference between the first data and the second data is compared with differences between a corresponding portion of the first virtual address and the first data and the second data respectively. When a result of the comparison is true, then a fourth virtual address is determined by adding the difference between the first data and the second data to the first virtual address, and then data at the fourth virtual address is prefetched into the cache.
Public/Granted literature
- US20200167285A1 PREFETCHING DATA TO REDUCE CACHE MISSES Public/Granted day:2020-05-28
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