Invention Grant
- Patent Title: Circuit testing and manufacture using multiple timing libraries
-
Application No.: US16676210Application Date: 2019-11-06
-
Publication No.: US10977402B2Publication Date: 2021-04-13
- Inventor: Ravi Babu Pittu , Chung-Hsing Wang , Sung-Yen Yeh , Li Chung Hsu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Duane Morris LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F30/3312 ; G06F30/39 ; G06F30/367 ; G06F119/12

Abstract:
A method and system for manufacturing a circuit is disclosed. In some embodiments, the system includes: at least one processor configured to: generate a first timing library for a first set of circuit elements for a first set of input parameters based on device characteristics for each of the circuit elements in the first set of circuit elements, and storing the determined device characteristics in a database; and generating a second timing library for a second set of circuit elements for a second set of input parameters based on device characteristics previously stored in the database for a first subset of the second set of circuit elements and determining device characteristics for a second subset of the second set of circuit elements using one of an aging simulation or a stress simulation; and a circuit generation system, coupled to the at least one processor, the circuit generation system configured to form a circuit on a substrate, wherein the circuit includes at least one of the first set of circuit elements or the second set of circuit elements.
Public/Granted literature
- US20200074030A1 CIRCUIT TESTING AND MANUFACTURE USING MULTIPLE TIMING LIBRARIES Public/Granted day:2020-03-05
Information query