Provided is an image processing apparatus that improves performance of reading data of a RIP process. A multi-channel DMA (Direct Memory Access) controller performs reading or writing of stored data related to a RIP (Raster Image Processor). A FIFO (First In, First Out) is able to change a number of entries for each of the channels of the multi-channel DMA controller. An image processing control unit interprets the RIP order, and according to that order, changes the configuration of the number of entries for each of the channels, and controls processing of the data.