Invention Grant
- Patent Title: Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate
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Application No.: US16474589Application Date: 2017-03-31
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Publication No.: US10978399B2Publication Date: 2021-04-13
- Inventor: Kristof Darmawikarta , Robert Alan May , Sri Ranga Sai Sai Boyapati , Wei-Lun Kane Jen , Javier Soto Gonzalez
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2017/025230 WO 20170331
- International Announcement: WO2018/182658 WO 20181004
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L21/768 ; H01L23/13 ; H01L23/495 ; H01L23/532
Abstract:
A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect, wherein the bridge die is embedded in the multilayer substrate structure. The die interconnect substrate comprises a via portion formed on the first bridge die pad of the bridge die. An average angle between a surface of the first bridge die pad and a sidewall of the via portion lies between 85° and 95°.
Public/Granted literature
- US20200051915A1 Die Interconnect Substrate, an Electrical Device, and a Method for Forming a Die Interconnect Substrate Public/Granted day:2020-02-13
Information query
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