Semiconductor test circuit, semiconductor test apparatus, and semiconductor test method
Abstract:
A semiconductor test circuit, apparatus, and method having a first relay disposed between a power supply and a switching element, a second relay disposed between a connection point of the switching element and a reverse conducting-insulated gate bipolar transistor (RC-IGBT) chip and a snubber circuit, a third relay disposed between the switching element and the RC-IGBT chip and a coil, and a fourth relay disposed between a diode and the switching element. A turn on/off test of an IGBT portion is performed by turning on the second and fourth relays. An avalanche test of the IGBT portion is performed by turning on the second relay. A short-circuit test of the IGBT portion is performed by turning on the first relay. A recovery test of an FWD portion is performed by turning on the first and third relays. At this time probes are brought into contact with electrodes once.
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