A memory device includes a memory cell array, a read operator, a shift level determiner, and a read operation controller. The read operator applies a read voltage to a selected word line coupled to selected memory cells and reads the selected memory cells in response to an evaluation signal. The shift level determiner calculates a shift value indicating a difference between a number of memory cells read as on-cells and a reference number, and determines a shift level of a threshold voltage distribution for the selected memory cells. The soft read table storage stores soft read set parameters. The read operation controller determines a plurality of soft read voltages based on the shift level and the soft read set parameters and controls the read operator in response to the evaluation signal.