Invention Grant
- Patent Title: Semiconductor device including dual trench epitaxial dual-liner contacts
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Application No.: US16418100Application Date: 2019-05-21
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Publication No.: US10998242B2Publication Date: 2021-05-04
- Inventor: Veeraraghavan S. Basker , Kangguo Cheng , Theodoras E. Standaert , Junli Wang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Douglas Pearson
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L21/768 ; H01L23/485
Abstract:
A complementary metal-oxide-semiconductor field-effect transistor (CMOS) device includes a first source/drain (S/D) region and a second S/D region different from the first S/D region. A first epitaxy film formed of a first semiconductor material is on the first S/D region. A second epitaxy film formed of a second semiconductor material is on the second S/D region. The CMOS device further includes first and second S/D contact stacks. The first S/D contact stack includes a first contact trench liner having a first inner side wall extending from a first base portion to an upper surface of the first S/D contact stack. The second S/D contact stack includes a second contact trench liner having a second inner side wall extending from a second base portion to an upper surface of the second S/D contact stack. The first inner sidewall directly contacts the second inner sidewall.
Public/Granted literature
- US20190273027A1 SEMICONDUCTOR DEVICE INCLUDING DUAL TRENCH EPITAXIAL DUAL-LINER CONTACTS Public/Granted day:2019-09-05
Information query
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