- Patent Title: Semiconductor device with insulating layers forming a bonding plane between first and second circuit components, method of manufacturing the same, and electronic device
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Application No.: US16558863Application Date: 2019-09-03
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Publication No.: US10998370B2Publication Date: 2021-05-04
- Inventor: Hiroshi Ikakura , Takumi Ogino
- Applicant: CANON KABUSHIKI KAISHA
- Applicant Address: JP Tokyo
- Assignee: CANON KABUSHIKI KAISHA
- Current Assignee: CANON KABUSHIKI KAISHA
- Current Assignee Address: JP Tokyo
- Agency: Venable LLP
- Priority: JPJP2018-171676 20180913
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L23/48 ; H01L21/00 ; H01L27/146 ; H01L23/532 ; H01L27/148 ; H01L23/538 ; H01L21/02 ; H01L23/373 ; H01L25/065

Abstract:
A semiconductor device comprising a first circuit component and a second circuit component, the first circuit component having a first wiring structure formed by stacking one or more wiring layers and one or more insulating layers on a first semiconductor substrate, the second circuit component having a second wiring structure formed by stacking one or more wiring layers and one or more insulating layers on a second semiconductor substrate, the first and second wiring structures being bonded to each other, their bonding planes being composed of oxygen atoms and carbon atoms and/or nitrogen atoms bonded to silicon atoms, and, numbers of their atoms satisfying a predetermined equation.
Public/Granted literature
- US20200091218A1 SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE Public/Granted day:2020-03-19
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