Invention Grant
- Patent Title: Fractional N PLL with sigma-delta noise cancellation
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Application No.: US16730413Application Date: 2019-12-30
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Publication No.: US10998911B1Publication Date: 2021-05-04
- Inventor: Firas N. Abughazaleh , David Bearden
- Applicant: NXP USA, Inc.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H03L7/197
- IPC: H03L7/197 ; H03L7/099 ; H03L7/089

Abstract:
An apparatus is disclosed that includes a phase detector circuit for generating a first pulse signal based on first and second input clock signals. A first circuit adjusts the first pulse signal by delaying transmission of a leading edge of the first pulse signal, but not a trailing edge of the first pulse signal. A charge pump circuit charges or discharges a capacitor based on the adjusted first pulse signal, and a voltage controlled oscillator (VCO) circuit generates an output clock signal with a frequency that depends on a voltage on the capacitor.
Information query
IPC分类: