An information processing apparatus includes: a first memory including a semiconductor device memory; a second memory including a cache memory, the second memory being configured to temporarily store data to be written in the semiconductor device memory; and a processor configured to execute a writing-back process that includes providing a notification regarding completion of writing of the data before the data stored in the second memory is written in the first memory, execute an alternative writing process that includes writing the data at a second physical address in the first memory when writing of the data at a first physical address in the first memory is failed, and execute an access process that includes accessing the data written at the second physical address based on address management information, the address management information indicating a correspondence between the first physical address and the second physical address.