Invention Grant
- Patent Title: Semiconductor device including adjacent semiconductor layers
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Application No.: US16080649Application Date: 2016-04-25
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Publication No.: US11004986B2Publication Date: 2021-05-11
- Inventor: Akito Nishii
- Applicant: Mitsubishi Electric Corporation
- Applicant Address: JP Tokyo
- Assignee: Mitsubishi Electric Corporation
- Current Assignee: Mitsubishi Electric Corporation
- Current Assignee Address: JP Tokyo
- Agency: Studebaker & Brackett PC
- International Application: PCT/JP2016/062898 WO 20160425
- International Announcement: WO2017/187477 WO 20171102
- Main IPC: H01L29/861
- IPC: H01L29/861 ; H01L29/868 ; H01L29/739 ; H01L29/78 ; H01L29/06 ; H01L29/32 ; H01L29/40

Abstract:
It is an object of the present invention to provide a technique of preventing electric-field concentration in a first P-type semiconductor layer during recovery operation. A semiconductor device includes a drift layer, an N-type semiconductor layer, a first P-type semiconductor layer, a second P-type semiconductor layer, an electrode, and an insulating layer. The N-type semiconductor layer and the first P-type semiconductor layer are disposed below the drift layer while being adjacent to each other in a lateral direction. The insulating layer is disposed above the first P-type semiconductor layer while being in contact with the second P-type semiconductor layer and the electrode.
Public/Granted literature
- US20190043998A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-02-07
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