Invention Grant
- Patent Title: Fin field-effect transistor with reduced parasitic capacitance and reduced variability
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Application No.: US16405200Application Date: 2019-05-07
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Publication No.: US11011626B2Publication Date: 2021-05-18
- Inventor: Kangguo Cheng , Ruilong Xie , Juntao Li , Chanro Park
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Douglas Pearson
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L21/033 ; H01L21/8234 ; H01L27/088
Abstract:
A method for manufacturing a semiconductor device includes patterning a plurality of semiconductor fins on a semiconductor substrate, and replacing at least two of the plurality of semiconductor fins with a plurality of dummy fins including a dielectric material. A gate structure is formed on and around the plurality of semiconductor fins and the plurality of dummy fins, and a source/drain contact is formed adjacent the gate structure.
Information query
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