Circuits and methods for improved clock signal level shifting in charge pumps that avoids shoot-through current and loss due to simultaneous switching, which may be powered by VIN or any available level of VDD, and which provides a high level of clock signal voltage swing. Embodiments include a non-overlapping clock generator that generates a set of separate non-overlapping clock signals that are applied to a differential clock level translator coupled to a charge pump. The differential clock level translator level shifts the set of non-overlapping clock signals to a set of level-shifted non-overlapping clock signals. The charge pump is configured to receive the sets of non-overlapping clock signals and apply them to corresponding NMOS and PMOS switches. The set of level-shifted non-overlapping clock signals have shifted voltages sufficient to switch corresponding switches having elevated source voltages VS. The charge pump may be a differential charge pump in some embodiments.