Invention Grant
- Patent Title: CPU cache flushing to persistent memory
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Application No.: US16167189Application Date: 2018-10-22
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Publication No.: US11016890B2Publication Date: 2021-05-25
- Inventor: Paul Stonelake , Samir Mittal
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Greenberg Traurig
- Main IPC: G06F12/0806
- IPC: G06F12/0806 ; G06F3/06

Abstract:
A computing system having a power loss detector and memory components to store data associated with write commands received from a host system. The write commands are flushed from a protected write queue of the host system responsive to detecting an impending loss of power. The computing system further includes a processing device to receive the write commands over a memory interface. The processing device is further to, responsive to detecting the loss of power by the detector: disable the memory interface, and store the data associated with write commands that are received prior to disabling the memory interface. The data is stored in one or more of the memory components using power supplied by one or more capacitors.
Public/Granted literature
- US20190243759A1 CPU Cache Flushing to Persistent Memory Public/Granted day:2019-08-08
Information query
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