A method for manufacturing a semiconductor memory device includes forming a first doped semiconductor layer on a conductive layer, forming a second doped semiconductor layer stacked on the first doped semiconductor layer, forming a third doped semiconductor layer stacked on the second doped semiconductor layer, and forming a memory stack layer on the third doped semiconductor layer. The memory stack layer and the first, second and third doped semiconductor layers are patterned into a plurality of pillars spaced apart from each other. In the method, a plurality of extrinsic base layers are formed adjacent the patterned second doped semiconductor layers. The patterned first, second and third doped semiconductor layers in each pillar of the plurality of pillars are components of a bipolar junction transistor device, and the plurality of pillars are parts of a memory cell array having a cross-point structure.