An array substrate and a method of fabricating the same are described. The array substrate has an active area and a winding area, wherein the array substrate has a base substrate, an active layer, a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, a third insulating layer, a third metal layer, a flat layer, a patterned inorganic layer, and a pixel defining layer. The first metal layer has at least one first wiring pattern. The second metal layer has at least one second wiring pattern. The third metal layer has at least one third wiring pattern. The patterned inorganic layer is disposed on the flat layer within the winding area and has an undercut structure. The array substrate and the method of fabricating the same can reduce a width of a boundary formed by the winding area.