Invention Grant
- Patent Title: Time-interleaved sub-ranging analog-to-digital converter
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Application No.: US16886474Application Date: 2020-05-28
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Publication No.: US11018682B1Publication Date: 2021-05-25
- Inventor: Sushil Kumar Gupta , Pankaj Agrawal , Ashish Panpalia
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Agent Rajeev Madnawat
- Main IPC: H03M1/12
- IPC: H03M1/12 ; H03M1/14 ; H03M1/46

Abstract:
A sub-ranging analog-to-digital converter (ADC) includes a coarse ADC and a fine ADC that receives a set of coarse signals from the coarse ADC. The fine ADC includes multiple digital-to-analog converters (DACs) and multiple converters such that a number of converters is less than a number of DACs. The DACs and the converters function in a partial time-interleaved manner where each DAC receives an analog input signal in different non-overlapping durations of a clock signal and generates a corresponding analog output signal. At least one of the converters is coupled with at least two DACs, and each converter is configured to receive the corresponding analog output signals and perform conversion operation to generate digital signals in non-overlapping durations of the clock signal, respectively. The durations for performing conversion operation of at least two of the converters overlap partially.
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