Invention Grant
- Patent Title: Methods and apparatuses for executing a plurality of queued tasks in a memory
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Application No.: US16136101Application Date: 2018-09-19
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Publication No.: US11023167B2Publication Date: 2021-06-01
- Inventor: Giuseppe D'Eliseo , Graziano Mirichigni , Danilo Caraccio , Luca Porzio , Antonino Pollio
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06

Abstract:
Methods and apparatuses are disclosed for executing a plurality of queued tasks in a memory. One example apparatus includes a memory configured to be coupled to a host. The memory is also configured to receive a plurality of memory access requests, a status request, and an execution command from the host, and to execute one or more of the plurality of memory access requests responsive to the execution command from the host. The execution command includes a plurality of respective indications that correspond to each respective memory access request of the plurality of memory access requests and that indicate whether the host is requesting the memory to execute each respective memory access request.
Public/Granted literature
- US20190018618A1 METHODS AND APPARATUSES FOR EXECUTING A PLURALITY OF QUEUED TASKS IN A MEMORY Public/Granted day:2019-01-17
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