A semiconductor memory device may include: a memory cell array including a plurality of memory cells; a peripheral circuit for performing a program operation on the memory cell array; and a control logic for controlling the peripheral circuit to perform the program operation on the memory cell array. The control logic may control the peripheral circuit to perform a program operation on memory cells included in a selected physical page among the plurality memory cells, in response to a program command, and control the peripheral circuit to perform an additional program operation on at least one memory cell among the memory cells included in the selected physical page, based on whether the program operation has passed.