Invention Grant
- Patent Title: Temperature correction in memory sub-systems
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Application No.: US16909503Application Date: 2020-06-23
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Publication No.: US11023177B2Publication Date: 2021-06-01
- Inventor: Gianni Stephen Alsasua , Karl D. Schuh , Ashutosh Malshe , Kishore Kumar Muchherla , Vamsi Pavan Rayaprolu , Sampath Ratnam , Harish Reddy Singidi , Renato Padilla, Jr.
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G06F3/06 ; G06F12/1009 ; G11C16/34 ; G11C16/26

Abstract:
A memory device may receive a read request describing a logical address at the memory device. The memory device may obtain a table entry associated with the logical address. The table entry comprises a physical address corresponding to the logical address and a write temperature data indicating a write temperature for the logical address. The memory device may determine a corrected threshold voltage for reading the physical address based at least in part on the write temperature data and read the physical address using the corrected threshold voltage.
Public/Granted literature
- US20200319827A1 TEMPERATURE CORRECTION IN MEMORY SUB-SYSTEMS Public/Granted day:2020-10-08
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