Invention Grant
- Patent Title: Scheduling of tasks in a multiprocessor device
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Application No.: US16331993Application Date: 2017-09-19
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Publication No.: US11023277B2Publication Date: 2021-06-01
- Inventor: Peleg Aviely
- Applicant: RAMON CHIPS LTD.
- Applicant Address: IL Yokneam Illit
- Assignee: RAMON CHIPS LTD.
- Current Assignee: RAMON CHIPS LTD.
- Current Assignee Address: IL Yokneam Illit
- Agency: Kligler & Associates Patent Attorneys Ltd
- International Application: PCT/IB2017/055648 WO 20170919
- International Announcement: WO2018/055507 WO 20180329
- Main IPC: G06F9/48
- IPC: G06F9/48 ; G06F9/50 ; G06F9/52 ; G06F9/46 ; G06F9/38

Abstract:
Computational apparatus including multiple processing cores, which concurrently execute tasks that are respectively assigned to them. A central scheduling unit (CSU) including a CSU memory holding one or more look-up tables (LUTs) listing tasks for allocation to the processing cores and respective conditions for enabling of each of the tasks. The CSU receives indications of termination of the tasks by the processing cores, and selects, responsively to the indications, enabled tasks from the one or more LUTs for allocation to the processing cores. A network of distribution units are connected between the CSU and the processing cores. The distribution units allocate selected tasks from the CSU to the processing cores for execution and report the termination of the tasks from the processing cores to the CSU.
Public/Granted literature
- US20190258511A1 Scheduling of tasks in a multiprocessor device Public/Granted day:2019-08-22
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