Scheduling of tasks in a multiprocessor device
Abstract:
Computational apparatus including multiple processing cores, which concurrently execute tasks that are respectively assigned to them. A central scheduling unit (CSU) including a CSU memory holding one or more look-up tables (LUTs) listing tasks for allocation to the processing cores and respective conditions for enabling of each of the tasks. The CSU receives indications of termination of the tasks by the processing cores, and selects, responsively to the indications, enabled tasks from the one or more LUTs for allocation to the processing cores. A network of distribution units are connected between the CSU and the processing cores. The distribution units allocate selected tasks from the CSU to the processing cores for execution and report the termination of the tasks from the processing cores to the CSU.
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