A memory device may include a cell array and a cycle calculating circuit. The cycle calculating circuit may calculate an operating cycle of a refresh operation to be performed at the cell array, based on an operating temperature of the memory device. In response to the operating temperature being lower than a first temperature, the cycle calculating circuit may be configured to calculate the operating cycle by integrating one or more slope values of a second slope value to an nth slope value that are arranged from a highest temperature to a lowest temperature. The second slope value may correspond to a second temperature, the nth slope value may correspond to an nth temperature, n may be a natural number of 2 or more, and a number of the one or more slope values may be based on the operating temperature.