- Patent Title: Metal replacement vertical interconnections for buried capacitance
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Application No.: US16735857Application Date: 2020-01-07
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Publication No.: US11024551B1Publication Date: 2021-06-01
- Inventor: Hsueh-Chung Chen , Lawrence A. Clevenger , Daniel James Dechene , Somnath Ghosh , Carl Radens
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Randall Bluestone
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/8238 ; H01L21/02 ; H01L21/306 ; H01L23/528 ; H01L23/522 ; H01L23/532

Abstract:
A method is presented for forming a multi-level of interconnects underneath a complementary metal oxide semiconductor (CMOS) device. The method includes forming a stack including alternating layers of a semiconductor material and a first conductive material, patterning vias in the stack to define multiple stacks, depositing a first block material within each of the vias, forming a series of first block materials within a first via, forming a series of second block materials within a second via, the first and second vias being on opposed ends of a stack of the multiple stacks, and performing vertical metallization between the first block material and the series of first block materials in the first via, and between the first block material and the series of second block materials in the second via.
Information query
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