Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US16243809Application Date: 2019-01-09
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Publication No.: US11024639B2Publication Date: 2021-06-01
- Inventor: Shinichiro Abe
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2018-018564 20180205
- Main IPC: H01L27/11573
- IPC: H01L27/11573 ; H01L27/11568

Abstract:
Reliability of a semiconductor device is improved. A resist pattern having an opening in a first region where a memory transistor is formed and covering other regions is prepared. Next, by ion implantation using this resist pattern as a mask, a channel region is formed in a surface of a semiconductor substrate in the first region, and a nitrogen-introduction portion is formed inside the channel region. Next, the resist pattern is removed. Then, a gate insulating film having a charge storage layer is formed on the semiconductor substrate in the first region, and a gate electrode is formed on the gate insulating film.
Public/Granted literature
- US20190244968A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2019-08-08
Information query
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