In one aspect, a gate driver circuit includes a clamp circuit connecting a first node to a second node. The clamp circuit is configured to provide a clamp voltage. The gate driver circuit also includes a first driver connected to the first node and to the second node. The first driver comprising a first input configured to receive the clamp voltage from the clamp circuit. The gate driver circuit further includes a first transistor having a drain connected to the first node, a source connected to a circuit output and a gate connected to an output of the first driver. The first transistor has a gate-to-source voltage and an output voltage of the circuit output does not exceed the clamp voltage less the gate-to-source voltage of the first transistor.