Invention Grant
- Patent Title: Integrated circuit structure and method with hybrid orientation for FinFET
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Application No.: US16741530Application Date: 2020-01-13
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Publication No.: US11031418B2Publication Date: 2021-06-08
- Inventor: Tzer-Min Shen , Zhiqiang Wu , Chung-Cheng Wu , Ching-Wei Tsai , Kuan-Lun Cheng , Chih-Hao Wang , Min Cao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/12 ; H01L27/092 ; H01L21/762 ; H01L21/84 ; H01L29/423 ; H01L29/786 ; H01L29/78 ; H01L29/04 ; H01L29/06

Abstract:
The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first fin active region of a first semiconductor material disposed within the first region, oriented in a first direction, wherein the first fin active region has a crystalline direction along the first direction; and a second fin active region of a second semiconductor material disposed within the second region and oriented in the first direction, wherein the second fin active region has a crystalline direction along the first direction.
Public/Granted literature
- US20200152666A1 Integrated Circuit Structure and Method with Hybrid Orientation for FinFET Public/Granted day:2020-05-14
Information query
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