Invention Grant
- Patent Title: Svia using a single damascene interconnect
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Application No.: US16406447Application Date: 2019-05-08
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Publication No.: US11037822B2Publication Date: 2021-06-15
- Inventor: Yann Mignot , Muthumanickam Sankarapandian , Yongan Xu , Joe Lee
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Abdy Raissinia
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L21/311 ; H01L21/321

Abstract:
A method is presented for forming interlayer connections in a semiconductor device. The method includes patterning an etch stack to provide for a plurality of interlayer connections, etching guide layers following the etch stack to a first capping layer to form a plurality of guide openings, concurrently exposing a first plurality of conductive lines and a second plurality of conductive lines to form a plurality of interlayer connection openings by etching through the plurality of guide openings to remove the first capping layer, an interlayer dielectric, and a second capping layer, and depositing a metal fill in the plurality of interlayer connection openings to form the plurality of interlayer connections.
Information query
IPC分类: