Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US16676053Application Date: 2019-11-06
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Publication No.: US11037849B2Publication Date: 2021-06-15
- Inventor: Pei-Haw Tsao , Chien-Jung Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L21/56 ; H01L23/00

Abstract:
A semiconductor structure includes a substrate comprising a die pad disposed over the substrate, and a passivation disposed over the substrate and surrounding the die pad, a redistribution layer (RDL) comprising a dielectric layer disposed over the passivation and an interconnect structure disposed within the dielectric layer and electrically connecting with the die pad, a conductive bump disposed over and electrically connected with the interconnect structure; and an isolation layer surrounding the substrate and the RDL.
Public/Granted literature
- US20200075449A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-03-05
Information query
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